Workshop Presentations   John Biafore, KLA Tencor Stochastic Simulation of Resist Effects on Roughness and Uniformity at EUV Karl K. Berggren MIT Commensuration and Local Strain in Sub-10-nm Block Copolymer Self Assembly Tim Crimmins, Intel Toward high yield EUV lithography; patterned reticle and wafer defect metrology challenges and opportunities Carlos Fonseca, TEL Employing cost-effective solutions in double patterning schemes Yuri Granik, Mentor Graphics Challenges in mask optimization for Optical Lithography Naoya Hayashi, DNP Nanoimprint Lithography Template Technology:Progress and Issues Ed Holland, HP Roll to roll imprint lithography for flexible electronics and structural templates Jim Jacob, Actinix  Long coherence length sub-200 nm light source for full-field interference lithography Andrew Kahng, UCSD Musings On A Roadmap for DFM John Knickerbocker, IBM 3D Technology for Systems Applications Lloyd Litt, Sematech SEMATECH  Nanoimprint Program Update and Technology Assessment Hans Meiling, ASML EUVL into production with ASML’s NXE platform Mark McCord, KLA-Tencor Progress on REBL Technology for Parallel High-Throughput Electron Beam Direct Write Lithography Andrew Neureuther, UCB Physics-Based Models for Process Awareness Soichi Owa, Nikon History of NGLs and Implications of CoO Analysis David Pan, UT Austin Layout Decomposition and Routing for Double Patterning Lithography Leo Pang, Luminescent  Computational Lithography and Computational Defect Management – One Needs the Other John S. Peterson Attaining the 22-nm Pitch Using Nonlinear Addition of 193-nm Interference ans EUV Lithography Techniques Kameshwar Poolla, IMPACT IMPACT Center Research in DPL: flavors, metrics, design rules Mike Rieger, Synopsis Applying Information Theory to Lithography Henry I. Smith, Lumarray, Inc. Maskless Photolithography for Customization Vivek Subramanian, UCB Droplet-on-demand direct patterning of active materials: materials, modeling, and integration Serge Tedesco, LETI A ML2(MAPPER)  status through the “ IMAGINE” industrial consortium Michael Thompson, Cornell Sub-millisecond Post-Exposure and Hard Bake of Chemically Amplified Photoresists Toshikazu Umatate, Vice President, Nikon Challenges for Future Lithography beyond 20nm Vincent Wiaux, IMEC Multiple patterning... various keys for scaling H. Yaegashi, Tokyo Electron Ltd. The self-aligned Spacer DP process towards 11nm node and beyond